Oerlikon Systems

Applications

CLUSTERLINE 200 II

Breakthroughs add CCD-like performance to cost-effective CMOS sensors

The Above IC Principle
The Above IC imaging technology starts out with a conventional CMOS circuit, however, the sensor is built on top of the CMOS logic. The sensor fabrication sequence is shown in figure to the right.

The diode structure (NIP, IP, ...) and whether to pattern each layer is depending on the particular device design.

The Above IC Advantages
100% Fill Factor

The entire pixel area is photosensitive, causing the Above IC image sensors to achieve a dramatic drop in factor size for the same diode performance. With the Above IC design, a fill factor of nearly 100% can be achieved without a microlens.

 Production Solution

The CLUSTERLINE® 200 II, with up to 6 process modules, is available today for 8" wafer imager applications, including:

  • PVD for rear and upper electrode deposition
  • PECVD for amorphous diode stack deposition
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